1. Field of the Invention
This invention relates generally to one time programmable memories (eFuses (electrically programmable fuses), EPROM (Erasable Programmable Read-Only Memory) circuits, etc.). More specifically, this invention relates to an one time programmable memory monitor bank consisting of a plurality of test one time programmable circuits, each circuit having varying parameters, selected from a plurality of possible parameters, and utilized to evaluate whether functional one time programmable memory have or will program (i.e. blow) successfully.
2. Description of the Related Art
Electronic systems increasingly require function to be enabled, disabled, or modified after semiconductor chips used in the electronic systems have been manufactured or have been placed into commerce. For example, a common chip may be designed to serve multiple applications, the chip originally having circuitry to support all of the multiple applications. After manufacture of the chip, eFuses can be blown to personalize the chip for a particular specific application. For a second example, sometimes chips are manufactured imperfectly and portions of the chip are unusable. A computer processor chip may be designed to have a 128 KB (kilobyte) cache, but testing may determine that only 64 KB of the 128 KB is functional. If the remainder of the chip is functional, the chip may still be used, but information must be stored on the chip so that no attempt to use the nonfunctional 64 KB portion of the 128 KB cache is performed.
In modern semiconductor chips eFuses are often used to store such information. An eFuse is electronically programmable, and may be programmed by blowing the eFuse after a chip is manufactured. In many applications, the eFuse is blown even after an electronic system utilizing the chip has been in operation for some time.
An eFuse comprises a silicided polysilicon conductor. Silicide has been widely used in semiconductor products to reduce resistance of a polysilicon conductor, for example polysilicon gates used in Field Effect Transistors (FETs), or a doped silicon region, such as a source or drain of a FET. An eFuse is blown by directing a current of sufficient magnitude and duration through the eFuse to remove by melting or electromigration at least a portion of the silicide between a first end and a second end of the eFuse. Removal of at least a portion of the silicide changes an electrical resistance between the first end and the second end of the eFuse. However other mechanisms may also be used to blow an eFuse. Descriptions of eFuses can be found in U.S. Pat. No. 6,368,902, “Enhanced eFuses by the local degradation of the fuse link”, by Chandrasekharan Kothandaraman, et al, and U.S. Pat. No. 6,624,499, “System for programming fuse structure by electromigration of silicide enhanced by creating temperature gradient”, by Chandrasekharan Kothandaraman, et al.
Normal process and/or manufacturing variations in device components utilized in eFuse circuits may increase the difficulty to sense that an eFuse has been successfully blown. For example these variations may be, but not limited to: transistor channel length (i.e. fluctuations in the distance between the source and drain of a transistor gives rise to variations in drain current) gate width (i.e. fluctuations in the gate width of a transistor gives rise to variations in drain current) and threshold voltage. Some of the causes of threshold voltage variation are: worsening short channel effect, variations in gate oxide thickness, variations in FET currents due to temperature gradients, etc.
Along with the processing and/or manufacturing variations, the ability to blow and sense eFuses also varies with environmental conditions. For example these variations may be, but not limited to: temperature, biasing, voltage, noise, etc.
Wear out mechanisms common in silicon devices can also add variability to device characteristics over time, making the ability to blow and sense eFuses difficult. For example these variations may be, but not limited to: hot electron degradation and negative bias temperature instability (NBTI). These variations have, in previous electronic systems having eFuses, resulted in eFuses failing to blow, causing logic and other design faults.
eFuses are subjected to natural or environmental component degradations, tolerances, or errors that cause the ability to blow and sense eFuses difficult. It is also increasingly common for electrical systems to utilize eFuses that are to be programmed after the device has left control of the manufacturer. Therefore, there is a need for a method and apparatus that determines whether eFuse programming will be or has been successful.